Hours

The counter implementation for this stage follows roughly the same convention as the minutes stage from the last section in regards to the approach for implementation. Since the hours stage required a count to 12 with a reset back to 1, both counters had to be modified to rely on one another to function correctly.

For the ones place, the counter needed to be set up in such a way that it would switch back and forth between being a modulo-10 or a modulo-3 counter after every iteration. In order for the ones place to keep track of which modulo it was suppose to count to, the tens place counter was used as a register since the tens place counter is essentially a one bit flip-flop - the only states it can assume is either a '0' or '1'. Thus the Q0 output of the tens place was ANDed with Q1 of the ones place counter to form the "parallel load enable" signal that is used to reset the ones counter to '1' and the tens counter to '0'.

To this "parallel load enable" signal, I then ANDed the "ripple carry out" of the previous stages because this stage must only change when the seconds and minutes stages change back to '0'. Again, since the counter's "parallel load enable" pin is active low, I had to invert the signal before feeding it in.

The next step, after finishing the simple hours' stage, was to work on the AM/PM counter. My first thought was to use the next stage from the ten's place of the hours' stage as a register to hold the PM flag, but one little fact threw that idea into the shredder. Since the change from AM to PM, and vice versa, occurs at '12:00' and not at reset, the counter must be able to toggle Q2 and Q0 at the same time to provide a '1', for the '12' and either a 0 or 1 for the PM flag. Being defeated, I decided to just add an external flip-flop with its clock input tied to the un-inverted "parallel load enable" signal.

The flip-flop I have added is a D-Type Flip flop that has its !Q stage fed into its D input. In this configuration, the flip-flop will toggle between 0 and 1 on each rising edge of the non-inverted "parallel load" signal.

Time Convention Change

While thinking about this, I had initially believed that in order for the hours' stage to be able to switch between military time and standard time, a change to the counters themselves was required. While one approach was to alter the counters themselves, a little more thought produced a much simpler solution.

Instead of trying to alter the counters whenever one wishes to switch from one time convention to the other, one could just alter the output after the counters. A quick comparison, between standard and military time, showed that the main difference between the two was that when standard time was in PM, the hours portion, for military time, was the same with an offset of 12. To generate this offset, I utilized two four bit adders since BCD addition will have to be performed in order to avoid having to convert from binary to BCD for the 7-segment decoders.

Below is a table that outlines the differences between standard and military time.

Further more, it was noted that the offset of 12 hours, for military time, takes place when standard time was in the range of 1:00 to 11:00 p.m. To satisfy this requirement, or at least the first half, the next stage of the ten's place was used to act as a "toggle" whenever the parallel load signal became active. Note that I could not have used the PM's toggle because the offset is not needed at 12:00 p.m.

To fulfill the other half, 12:00 a.m. is 0:00 in military time, I took the easy way out and just made the bits that were to produce a true be false for the output. Anymore thought into this would have most likely produced a more complex circuit and a longer web page about the hours' stage that I am sure we are all tired of reading/writing by now.